TORONTO—Micron is the latest company to join the OpenMP Architecture Review Board (ARB), a group of vendors and research organizations driving the standard for the popular shared-memory parallel programming model.
The memory vendor is one of 14 software and hardware vendors that comprise the OpenMP ARB’s permanent members who have a long-term interest in creating projects for OpenMP. There are nine auxiliary members with an interest in the standard but don’t create or sell OpenMP products, including NASA, the Texas Advanced Computing Center, the Sandia National Laboratory and the University of Houston.
Micron actually came to be a member of the OpenMP ARB through its acquisition of Convey Computers, said John Leidel, software development compiler manager at Micron. Remaining part of the initiative and taking on an active role in developing and pushing the standard forward reflects Micron’s efforts to diversify beyond being just a memory company as well recognizing the role of software as memory technologies evolve, he told EE Times in a telephone interview from Supercomputing 2015 in Austin, Texas.
“More users are requiring access to software, tools and programming models,” he said. “OpenMP has a great legacy in supporting shared memory programming models.” As Micron is now constructing non-volatile DIMMs (NVDIMMs), said Leidel, as well as pushing development on DRAM and hybrid memory cube (HMC), it’s recognizing the need to solve problems in ways that are portable between platforms, and OpenMP is great for supporting heterogeneous memory architectures.
Leidel said Micron wants to promote the OpenMP standard as the company’s approach to systems integration, and sees its work around the specification as complementary to work being done by other members that include HP, IBM and Texas Instruments (TI).
Texas Instruments' proposed OpenMP 4.0 accelerator model for heterogeneous SoC
Matthijs van Waveren, marketing coordinator for the OpenMP ARB, as well as the Fujitsu representative, said shared memory is growing as an application field. The OpenMP API is a portable, scalable model that gives parallel programmers a simple and flexible interface for developing parallel applications for platforms ranging from embedded systems and accelerator devices to multicore systems and shared-memory systems. It was initially adopted by computer scientists as an informal standard in 1997.
A number of member companies have support in their products for OpenMP, said van Waveren. For example TI offers support for the OpenMP API in its KeyStone multicore architecture, which supports heterogeneous programming as well as the integration of TI’s fixed- and floating-point TMS320C66x digital signal processor (DSP) cores and ARM Cortex-A15 MPcore processors. Its C66x DSPs were the first multicore DSP devices to support the OpenMP API.
The fields for which the OpenMP standard might find use are fairly broad, added van Waveren, and there are more and more use cases, from auto manufacturers doing car crash simulation and analysis to aerospace companies running simulations to reduce drag on wings.
The OpenMP 4.0 API specification was released in July 2013 and supports the programming of accelerators, SIMD programming, and better optimization using thread affinity. The release added a new mechanism to describe regions of code where data and/or computation should be moved to another computing device.
—Gary Hilson is a general contributing editor with a focus on memory and flash technologies for EE Times.
